| 000 | 00611nam a2200217Ia 4500 | ||
|---|---|---|---|
| 003 | IN-BaIIA | ||
| 008 | 211028s9999 xx 000 0 eng d | ||
| 020 | _a978-81-265-1931-6 | ||
| 040 | _cIIA Library | ||
| 080 |
_a681.3.01 _bPAD |
||
| 100 |
_aPadmanabhan, T. R _935421 |
||
| 245 | 0 |
_aDesign through verilog HDL _cT. R. Padmanabhan and B. Bala Tripura Sundari |
|
| 250 | _arep. | ||
| 260 |
_aNew Delhi _bWiley _c2003 |
||
| 300 | _axii, 455p. | ||
| 650 |
_aEmbeded programming _935422 |
||
| 650 | _aVerilog HDL | ||
| 650 |
_aVLSI design _919248 |
||
| 700 |
_aBala Tripura Sundari, B _935577 |
||
| 942 | _cBK | ||
| 999 |
_c18524 _d18524 |
||