000 00565nam a2200181Ia 4500
003 IN-BaIIA
008 211028s9999 xx 000 0 eng d
020 _a81-7758-918-0
040 _cIIA Library
080 _a681.3.01
_bPAL
100 _aPalnitkar, Samir
_930569
245 0 _aVerilog HDL
_ba guide to digital design and synthesis
_cSamir Palnitkar
250 _a3rd ed.
260 _aNew Delhi
_bPearson
_c2007
300 _a490p.
650 _aVerilog(Computer hardware description language)
_930570
942 _cBK
999 _c16472
_d16472