Padmanabhan, T. R <br/><br/>
Design through verilog HDL 
T. R. Padmanabhan and B. Bala Tripura Sundari 
 - rep. 
 - New Delhi  Wiley  2003 
 - xii, 455p. 
<br/><br/><label>ISBN: </label>978-81-265-1931-6 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Embeded programming<br/>Verilog HDL<br/>VLSI design
<br/><br/><label>Universal Decimal Class. No.: </label>681.3.01  / PAD